机器人摄像头023ov5116n.doc

OV5116NOV5116N SINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUTFeaturesn Single chip 1/4 inch format video image sensorn EIA/NTSC outputn Selectable mirror imagen Auto gain control (maximum + 18 dB)n High I.R. sensitivity for nighttime applicationsn Auto and manual backlight compensation moden Gamma correction -On/OffGeneral DescriptionThe OV5116N is a complete black and white CMOS VideoCamera chip. It conforms to EIA/NTSC (60 Hz) standardsand outputs composite video capable of directly driving a 75Ωdisplay device. The on-chip auto exposure allows for a wide range of lightingconditions, eliminating the need for external mechanical shut-ter components. This, along with its single supply, low powerconsumption makes the OV5116N an incredibly versatile andcost-effective video camera perfect for the following types ofapplications:n External frame sync capabilityn 40mw on-chip power consumptionn External data acquisition supportn Smear freen Auto level expandingn Optional edge enhancementApplicationsn Securityn Surveillancen Machine Visionn Process Controln CCTVn Infant Monitoringn ToysKey SpecificationsArray Size 320 x 240 pixelsABOFFVCBRT564 3 2 128 27 2625 DEGND24 ATBLKTEffective Image AreaAuto Electronic Exposure (seconds)3.2 x 2.5mm1/60-1/6000SGND7OV5116N23 OVDDMinimum Illumination0.5 lux @ f 1.4(3000k)NTSC 8BKLT 9XTAL2 10XTAL1 1128 PIN LCC12 13 14 15 16 17 1822 CVO21 DGND20 DVDD19 PCLK/G8XS/N RatioPower Supply PowerRequirementsPackage Type46 dB (AGC=1x)5VDC, ±5%(40 mw before-loading), 70mw standard loading28 pin LCCOV5116N PIN ASSIGNMENTOmniVision Technologies, Inc. 930 Thompson Place Sunnyvale, CA 94085 U.S.A.Tel: (408) 733-3030 Fax: (408) 733-3061e-mail: info@Website: Version 2.1, May 4, 2001 SVDD AV D D N5 0 FS I DEVDD GAM M A AGND OENB FA S T BPED VRC H G VREQ G4X FS O /M IR ROMNIVISION TECHNOLOGIES, Inc.OV5116N1. IntroductionSINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUTThis section describes the features and functions of the OV5116N, a monochrome CMOS video camera integrated circuit.2. Pin Assignments:Table 1. Pin Descriptions Pin #1, 2, 20, 23, 2634567, 21, 25, 288*91011121314151617NameAVDD, SVDD,DVDD, OVDDDEVDDVRCHGN50ABOFFVCBRTSGND, DGND,DEGND, AGNDNTSCBKLTXTAL2XTAL1FSIOENBG4XFASTBPEDGAMMAClassBiasOAI-ØI-ØOABiasI-1I-ØXOXII-ØI-ØI-ØI-ØI-ØI-1Function Power (+5V) connections.Internal voltage reference. Connect to AGND with a 0.1uF capacitor. Set low(Ø)=standard NTSC. Set high (1)=50hz light (For use in Japan Only);Auto brightness level descending function offVideo DC Output Black level, leave it open in usual caseGround connections. Connect to supply common.Set high(1)=EIA/NTSC modeBacklight mode 1Oscillator clock output or crystal output. External oscillator input or crystal input: 12.288MHzExternal frame sync input. A rising edge on FSI sets the chip timing to vertical sync. Leave open if unused.A logic level input to enable or tri-state CVO. Logic high(1)=tri-state;low(Ø)=enabled.A logic level input which when high places the maximum AGC gain to 4x. When low thesensor AGC gain is 2x.A logic level input to enable/disable AGC/AEC FAST mode. High enables, low disables, which provides slow and smooth AGC/AEC mode.A logic level input to disable on chip edge enhancement. High disable, low enable.A logic level pin to select the transfer characteristic of output voltage versus light input. Logic high for g=0.45; low for g=1.18 FSO/MIRRI/OØ/ØIn/out pin.Frame Sync Output. Digital frame sync output pin. Positive pulse occurs duringthe CVO vertical sync period. Input is a logic level input to enable mirror function. Low(Ø)=Standard, High(1)=Mirror.1922*2427PCLK/G8XCVOATBLKTVREQI/OØ/ØQI-ØOADigital pixel clock output. Provides 2 functions: When high a valid pixel is present at CVO and in sync with PCLK. Input is a logic level input to enable maximum AGC gain to 8x(only effective when pin 14 is set to high(1))The composite video output signal. The output is a source follower capable of directly driving a 1V p-p signal into a 108 Ω load.(75Ω external and 33Ω internal)Backlight mode 2Internal voltage reference level. Connect to AGND with a 0.1uF capacitor.* Pin 9 and Pin 24 must be used in a logical combination as per the following table:ATB LK(Pin 24)BLK T(Pin 9) ModeØØ11ClassØ1Ø1Default LevelNo。