清大微波电路与ADS实作【第五点二集】5-2LNA Design(TwoStageLNA)

1、Balance LNA-900INISO-900INISOR=50 OhmR=50 OhmHybrid90Hybrid90RF InputRF OutputPush-Pull LNA1800INISO1800INISOR=50 OhmR=50 OhmHybrid180Hybrid180RF InputRF OutputTransmission Line Hybrid270909090port1port4port3port2Z0=70.7Rat Riceport1port2port390port4Z=50 Z=50 250250Branch Line CouplerBalance LNA Integrated Xinger brand hybrid and PHEMT ATF54143BO JENSEN,”Build LNAs With An Integrated Approach” pp.7985,DECEMBER 2002,MICROWAVES & RFPerformance of Balance LNA Design B with Behave Hybrid90m1 freq= d

2、B(S(2,1)=16.651.00GHzm2 freq= nf(2)=1.441.00GHz0.20.40.60.81.01.21.41.61.80.02.0-5051015-1020-80-70-60-50-40-30-90-20freq, GHzdB(S(2,1)m1dB(S(1,1)dB(S(2,2)dB(S(1,2)nf(2)m2GaAs MMIC MESFET Limiter/LNAJim Looney, David Conway, and Inder Bahl,” An Examination of Recovery Time of an Integrated Limiter/LNA,“ pp. 8386 March 2004 IEEE Microwave MagazineBias Circuit Design By Curve Trace By ADS Transistor UitilityBy Al Ward and Bryan Ward “A Comparison of Various Bipolar Transistor Biasing Circuits Tran

3、sistor Biasing Circuits”, APPLIED MICROWAVE & WIRELESSPassive Bias CircuitVBRERB1VccRRBRB2VccVccVccVccRCRCRCRB RBbacRCRB1RB2RCRB2RB1dePercent Change in Ic vs. TemperatureabcdeDesign Bias Circuit with Curve TraceVBVc=8V Ic=10mADC_BJT SIM1VCE_points=31VCE_stop=15.0VCE_start=0IBB_points=12IBB_stop=150 uAIBB_start=25 uABJT Curve TracerBaseCollectorpb_hp_AT41411_19931124 Q1DisplayTemplate disptemp1 “DC_BJT_T“TempDispInserttemplate BJT _curve_traceKey in proper rangeData Display of Curve Trace24681012

4、140160.0000.0050.0100.0150.020-0.0050.025SIM1.IBB=2.500E-5SIM1.IBB=3.636E-5SIM1.IBB=4.773E-5SIM1.IBB=5.909E-5SIM1.IBB=7.045E-5SIM1.IBB=8.182E-5SIM1.IBB=9.318E-5SIM1.IBB=1.045E-4SIM1.IBB=1.159E-4SIM1.IBB=1.273E-4SIM1.IBB=1.386E-4SIM1.IBB=1.500E-4VCEIC.im1m1 indep(m1)= plot_vs(IC.i, VCE)=10.33m SIM1.IBB=0.0001058.000 Collector Current versus Bias CurvesEqn RC=(15-indep(m1)/10mARC700.0 RB77.40 kVBm2,m3787.6 mEqnRB=(indep(m1)-VBm2,m3)/indep(m2)40.00u 60.00u 80.00u 100.0u 120.0u 140.0u20.00u160.0u0.0

5、1.5E5SIM1.IBBm2m2 indep(m2)= plot_vs(0:sweep_size(SIM1.IBB)-1,SIM1.IBB)=6.000 93.18u2.000 4.000 6.000 8.000 10.00 12.00 14.00 0.000016.00 0.01.5E5VCE0,:m3m3 indep(m3)= plot_vs(0:sweep_size(VCE0,:)-1,VCE0,:)=16.00 8.000 ADS Bias UitilityVccVc=8V Ic=10mAV_DC SRC1 Vdc=12 VDA_BJTBias1_AT41411Bias DA_BJTBias1VccC EBpb_hp_AT41411_19931124 Q1AT41411 No linear ModelADS Bias Uitility(II)DesignGuideA mplifiertools Transistor Bias UitilityKey In Transistor Operation Voltage Vce 12VKey In Supply Voltage Vcc

6、 12VKey In Transistor Operation Current Ic 10mIClick Design Button to ContinueSelecting Bias Network1.Click to Select bias network 2.Click OK to ContinueFinish Bias DesignDC_Feed DC_Feed3DC_Feed DC_Feed2DC_Feed DC_Feed1Port P4 Num=4Port P3 Num=3Port P2 Num=2Port P1 Num=1R R3 R=0 mOhmR R2 R=70.958425 kOhmR R1 R=395.977069 OhmPush into8.00 10.0 m791. mV102. uA8.00 V10.0 mA0.000 V10.1 mAAchieved Bias PerformanceAchieved Bias Voltage/CurrentDesired Bias PerformanceVceIbVcIcVeIeVb8.0010.0 mAIcMULTISA

7、TAGE LNACascaded Two StageDesign Two Stage LNA For Min. Noise FigureGamma1SGamma2LGa2INGa2SGa1LS1S2S1out1S2 = (2IN)*out2BA1IN2IN1L= (out1)*2LWithin Ga or Noise circle,Choose Smeet Gain, NF and Input Return LossWithin Gp and VSWR circle, Choose Lmeet Output Return LossInterStage Matching this Two Point (1LMatch with 2IN)TwoStageDesignLNA.ddsTwo-Stage MatchingL L3R=L=0.6 nHZl=(29.31-j*7.417) OhmZs=50 OhmZl=50 OhmZs=(213.6-j*18.14) OhmZl=(9.180-j*6.291) OhmZs=(141.6+j*48.88) OhmS1S2S1out1S2 = (2IN)

8、*out2BA1IN2IN1L= (out1)*2LSource=0(50 ohm)Load=Conj(S1) Source= 1LLoad=2INSource= 2LLoad=0(50 ohm)TwoStageMatching.dsnResult :Two_stage LNAm1 freq= dB(S(2,1)=34.8571.000GHzm2 freq= nf(2)=1.6801.000GHz0.20.40.60.81.01.21.41.61.80.02.0-100102030-2040-40-20-600freq, GHzdB(S(2,1)m1dB(S(1,1)dB(S(2,2)dB(S(1,2)nf(2)m2Referance ActicleAl Ward and Bryan Ward,”A Comparison of Various Bipolar Transistor Biasing Circuits, pp3052,APPLIED MICROWAVE & WIRELESS. Dale D. Henkes,” LNA Design Uses Series Feedback to Achieve Simultaneous Low Input VSWR and Low Noise,” pp2632,Applied Microwave & Wireless Surface Mount Low Noise Silicon Bipolar Transistor Chip AT-41411 data sheet Hybrid design RF,RFIC microwaveµwave theory,Design.WWW.rfic.co.uk. Agilent application note: 95-1 ,154 G. Gonzalez, Microwave Transistor Amplifiers:Analysis and Design, Prentice Hall, 1984, ISBN 0-13-581646

《清大微波电路与ADS实作【第五点二集】5-2LNA Design(TwoStageLNA)》由会员206****923分享，可在线阅读，更多相关《清大微波电路与ADS实作【第五点二集】5-2LNA Design(TwoStageLNA)》请在金锄头文库上搜索。