
北斗卫星信号模拟器及其闭环测试系统的设计与实现.pdf
84页密 级 桂林电子科技大学 硕硕 士士 学学 位位 论论 文文 题目题目 北斗卫星信号模拟器及其闭环测试系统的设计与实现 (英文)(英文) Design and Realization Of Beidou Satellite Signal Simulator And Its Closed Loop Test System 研研 究究 生生 学学 号号: 112021233 研研 究究 生生 姓姓 名名: 孙友礼 指导教师姓名、职务指导教师姓名、职务: 陈紫强 副教授 申申 请请 学学 位位 门门 类类: 工学硕士 学科、专学科、专 业业 名名 称称: 信号与信息处理 提提 交交 论论 文文 日日 期期: 2014 年 4 月 论论 文文 答答 辩辩 日日 期期: 2014 年 6 月 摘 要 I 摘 要 为了更好的实现北斗卫星导航系统(BeiDou Navigation Satellite System,BDS)的第三步发展战略,在北斗完成全球组网之前,需要使用北斗模拟器与接收机组合的闭环测试系统平台展开对信号体制、星座分布等内容的研究和高性能接收机的研制。
针对北斗星历不能自主更新和当前测试方法无法对接收机伪距测量精度作出评估的问题,本文设计了新型的模拟器和接收机的闭环测试系统,对高性能接收机研制具有指导意义 本文以北斗模拟器的研究与实现为中心展开 从北斗的信号结构及测距码结构等基本信息出发,对模拟器星历拟合技术和测量误差仿真技术关键技术进行了深入研究;研究了接收机的定位原理,编程实现了伪距提取和定位解算算法创新性的提出并设计了集模拟器和接收机一体的闭环测试系统给出了系统的总体设计过程,阐述了系统设计中相关算法的基本原理:包括用户轨迹生成、可见星判断、RTC 中断设计和多径信号生成等为了进一步提高中频信号的平稳度,在数字信号输出端设计了反 SINC 滤波器最后,设计了模拟器与接收机的数据传输方法该系统不仅能够分析电离层误差、多径效应对接收机定位的影响,而且可以对接收机伪距测量值的精度进行评估 本文在 FPGA+双 DSP 的硬件平台上实现了该闭环测试系统,采用控制变量法在不同环境下进行测试,具体包括:多径干扰、不同星座分布和电离层对流层测试结果如下: (1)在多径信号环境下,定位误差超过 10 米,该部分误差可以使用窄相关方法进行抑制,抑制后误差小于 4 米。
(2)在模拟器无电离层对流层误差修正时,定位误差超过了 7 米,误差修正后定位结果小于 3 米 (3)不同星座分布对定位结果影响较大,在较差星座分布情况下的定位误差超过百米,在较好的星座分布条件下,定位误差小于 10 米,该结论对北斗发射组网有一定的参考意义 关键关键词词:北斗模拟器;接收机;闭环测试;FPGA ;DSPAbstract II Abstract In order to better implement the third step of the development strategy of BeiDou Navigation Satellite System, it is necessary to study the signal structure and the satellite distribution as well as develop a highly-performed receiver by using the combined closed-loop system of BeiDou simulator and receiver before accomplishing the global constitution. Considering that the BeiDou ehpemeris can’t updata itsself and the receiver is unable to precisely assess the pseudo-range with current approaches, this paper proposes a new type of closed-loop testing system design which has guiding significance in the development of highly-performed receiver. The paper starts with the study and the realization of the simulator. Firstly, based on the signal and C/A code structure of the BDS, key technologies which include ephemeris fitting technology and simulation technique of the measurement error have been studied in depth. Secondly, positioning principles of receivers are studied, and pseudo-range extraction and positioning calculation are realized in terms of programming. To meet the requirement of the accurate measurement of the receiver, this paper proposes a novel closed-loop testing system which integrates the simulator and receiver. Next, the overall design of the proposed system has been elaborated in detail which includes the generation of the user trajectory, the estimation of the visible satellites, the interruption of the RTC and the generation of the multi-path signal. To improve the stability of the IF (intermediate frequency) signal, the anti-SINC filter is designed at the digital signal output port. Lastly, the simulator and receiver data transmission method is realized, and both the ionospheric error and the multi-path effect can be tested, and the pseudo-range measurement accuracy can be evaluated with the system. Finally, the system has been implemented on the dual-DSP plus FPGA hardware platform. Controlling variable method is used to test the system in different circumstances including the presence of multi-path signal situation, different constellation distribution, ionosphere and troposphere situation. The testing results are as follows: (1) In the presence of multi-path signal, the positioning error is larger than 10m, however, this error can be reduced to 4m by applying the narrow correlator method. (2) The positioning error of the receiver is over 7m without error correction for ionosphere and troposphere while it is less than 3m after the correction. (3) With a worse constellation distribution, positioning error is larger than one hundred meters while it less than 10m with a good constellation distribution. The study of the influences on the positioning error with different constellation distributions has a guiding significance for the network constitution of BD. Key words:: BeiDou simulator; receiver; closed-loop test; FPGA; DSP 目 录 III 目目 录录 摘 要 ...................................................................................................................................... I Abstract ................................................................................................................................. II 第一章 绪论 ......................................................................................................................... 1 § 1.1 课题研究背景及意义 ......................................................。












