数字电路教学课件：chapter5-1.ppt

Synchronous Sequential CircuitChapter 6AnalysisAnalysisAnalyze existing circuits to determine their functionlSynchronous sequential circuitlThe basic modeling structurelTwo circuit models: Mealy model & Moore modellThree approach used to describe the circuit:lLogic function equation l State table l State diagram2 /40Universal modelSystem output VariablesO0OmErExcitation VariablesE0Combinational Combinational logiclogicSystem Input VariablesI0InS0SxState VariablesMemoryFlip-flopsCLOCK3 /40Analysis principlelDetermine the system variables: input, state and output.lAssign names to the variables if they are not clear from the logic diagram.lDetermine the flip-flop type. Write the characteristics equations.lWrite the excitation equations by inspection from the logic diagram.lWrite the output variable equations. Determine whether the circuit is a Mealy or a Moore machine.4 /40Analysis principlelMealy model machinelE = f( I, St )lSt+1 = f( St, E ) flip-flop characteristics equationlO = g( I, St )lMoore model machinelE = f( I, St )lSt+1 = f( St, E ) flip-flop characteristics equationlO = g(St )5 /40lWrite the next state equations for each state variable, using the flip-flop characteristics equation and the circuit excitation equations, or construct the excitation table from the excitation equations.lConstruct a transition table. Identify all of the states possible for a given number of state variables.lAssign symbols to the states and construct a state table or state diagram.lWhen possible, construct a timing diagram.Analysis principle6 /40Logic circuitOutput variable equations &Excitation equationsNext-state truth tableNext-state equationsflip-flop Characteristic tableState diagram &State tableDescribe the circuit by a timing diagram and statementFlip-flop Characteristic equationtabletablealgebraalgebraAnalysis flowchart7 /40Example 6.2Start/stop sensorSTARTSTARTNSTOPSTOPNt1t2LVprojectile = L/ (t2-t1)8 /40lStart/ stop sensorslAs the bullet passes over the start sensor, the start signal (SRT)(SRT) is generated.lWhen the same bullet passes over the stop sensor, the stop signal (STP)(STP) is generated.Example 6.2Start/stop sensorSTART (SRT)STARTNSTOP (STP)STOP (STP)STOPN9 /40Example 6.2lBCD counter : lt2-t1 lmeasure the elapsed time of the bullet directly by counting the number of clock pulse. 10 /40Example 6.2lBCD counterlClock inputlClock generator : 2MHz Square-wave lClock frequency divider : 1MHz Square-wave lOutput : LED displaylEnable input: Reset/latchlSequential circuit controllerlSRT, SPT11 /40lSequential circuit controllerlThe external input variables : SRT, SPTSRT, SPTlThe external output variables §Clock enable : CENCEN (U3D)§Reset enable : CRSTCRST (U2A)§Latch enable : CLTCHCLTCH (U2B)lThe excitation variables§ §J1, K1J1, K1 (U1A-U2C/U2D)§ §J2, K2J2, K2 (U6A-U3A/U3B)lThe state variables§ §F1, F1’F1, F1’ (U1A)§ §F2, F2’F2, F2’ (U6A)Example 6.212 /40lSequential circuit controllerlThe external output variables lClock enable : CEN =F2CEN =F2· ·F1F1 (U3D)lReset enable : CRST =F2’CRST =F2’· ·F1F1 (U2A)lLatch enable : CLTCH =F2CLTCH =F2· ·F1’F1’ (U2B)lThe excitation variableslJ1=SRT·F2’ , K1=STP·F2 (U1A-U2C/U2D)lJ2=SRT’·F1 , K2=STP’F1’ (U6A-U3A/U3B)lThe state variableslF1t+1=J1F1’+K1’F1= SRT’·F2’·F1+STP·F2+F2·F1lF1t+1(F2,F1,SRT,STP)=∑m(2,3,4,5,6,7,12,14)lF2T+1=J2F2’+K2’F2= SRT’·F2’·F1’+STP’·F1+F2’·F1lF2t+1(F2,F1,SRT,STP)=∑m(4,5,9,11,12,13,14,15)13 /40F2t F1tCRST00011110010000100001CENCLTCHl Clock enable : CEN =F2CEN =F2· ·F1F1 (U3D)l Reset enable : CRST =F2’CRST =F2’· ·F1F1 (U2A)l Latch enable : CLTCH =F2CLTCH =F2· ·F1’F1’ (U2B)14 /40l F1t+1(F2,F1,SRT,STP) =∑m(2,3,4,5,6,7,12,14)F2t F1t00011110SRT/STP000111100 1 3 2 4 5 7 6 12 13 15 14 8 9 11 10 0110010011001110l F2t+1(F2,F1,SRT,STP) =∑m(4,5,9,11,12,13,14,15)MSB=A ; LSB=D00011110SRT/STPF2t F1t000111100 1 3 2 MSB=A ; LSB=D4 5 7 6 12 13 15 14 8 9 11 10 011001110011001015 /40l F1t+1(F2,F1,SRT,STP)=∑m(2,3,4,5,6,7,12,14)l F2t+1(F2,F1,SRT,STP)=∑m(4,5,9,11,12,13,14,15)MSB=A ; LSB=DMSB=A ; LSB=D00011110SRT/STPF2t F1t000111100 1 3 2 4 5 7 6 12 13 15 14 8 9 11 10 0110011100110010011001001100111016 /40l F1t+1(F2,F1,SRT,STP)=∑m(2,3,4,5,6,7,12,14)l F2t+1(F2,F1,SRT,STP)=∑m(4,5,9,11,12,13,14,15)MSB=A ; LSB=DMSB=A ; LSB=D00011110SRT/STPF2t F1t000111100 1 3 2 4 5 7 6 12 13 15 14 8 9 11 10 01100111001100100110010011001110F2t F1t00011110CRST010000100001CENCLTCHl Clock enable : CEN =F2CEN =F2· ·F1F1 (U3D)l Reset enable : CRST =F2’CRST =F2’· ·F1F1 (U2A)l Latch enable : CLTCH =F2CLTCH =F2· ·F1’F1’ (U2B)17 /40MSB=A ; LSB=D Transition tableMSB=A ; LSB=D00011110Next State, SRT/STPF2t F1t0001111001100111001100100110010011001110CRST010000100001CENCLTCHPresent stateOutput variables18 /4010/00110/00100,0100/00000/00000,1001/10001/10011,1011,1011/01011/01000,0101,1100,1001,11CENCRSTCLTCHSRT’SRT’SRTSRTSRT’SRT’STPSTPSTP’STP’F2F1/CRST, CEN, CLTCHSRT,STPSRTSRTSTP’STP’STPSTP19 /40SRT’SRTD/A/C/B/STPSTP’SRT’STP’SRTSTPCRSTCENCLTCHA: No bullet passes over the start sensor.B: A bullet is passing over the start sensor.C: The bullet passed over the start sensor, and is on the itinerary between the start sensor and the stop sensor.D: The bullet is passing over the stop sensor.A: The bullet passed over the stop sensor and no bullet passes over the start sensor.20 /40cpcpDetermine flip-flop type: negative edge triggered J-K Determine circuit model: MooreDetermine variables1 input variable: X X1 output variable: Y Y1 1, Y, Y2 22 state variables: Y Y1 1 , , Y Y2 24 excitation variables: J J1 1K K1 1, J, J2 2K K2 2J J1 1 =1 ; K=1 ; K1 1 =1 =1 J J2 2 = X= X⊕⊕⊕⊕Y Y1 1 ; K; K2 2 = X = X⊕⊕⊕⊕Y Y1 1Analysis example1J J1 1K K1 1Y Y1 1J J2 2K K2 2Y Y2 2=1=11 1X X21 /40 Next-state Truth TableInputInput Present Present statestateExcitationExcitationJ J2 2 K K2 2J J1 1 K K1 1Next Next statestateX XY Y2 2 Y Y1 1 Y Y2 2t+1 t+1 Y Y1 1t+1t+10 00 00 00 01 11 11 11 10 00 01 11 10 00 01 11 10 01 10 01 10 01 10 01 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 01 10 01 11 10 01 10 00 01 10 01 11 10 01 10 0J1 =1 K1 =1 J2 = X⊕⊕Y1 K2 = X⊕⊕Y1 Excitation equationAnalysis example10 1101001 22 /40Present Present statestateExcitationExcitationNext Next statestateY Yt t0 00 00 00 01 11 11 11 1J KJ K0 00 01 11 10 00 01 11 10 01 10 01 10 01 10 01 1Y Yt+1t+10 00 01 11 11 10 01 10 0Flip-flop Characteristic TableNext_state Truth Table0 00 00 00 01 11 11 11 10 00 01 11 10 00 01 11 10 01 10 01 10 01 10 01 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 01 10 01 11 10 01 10 00 01 10 01 11 10 01 10 0InputInput Present Present statestateExcitationExcitationJ J2 2 K K2 2J J1 1 K K1 1Next Next statestateX XY Y2 2 Y Y1 1 Y Y2 2t+1 t+1 Y Y1 1t+1t+11 10 01 10 01 10 01 10 00 01 11 10 01 10 00 01 1Analysis example123 /40Present Present statestateNext state/outputNext state/outputY Y2 2 Y Y1 1Y Y2 2t+1 t+1 Y Y1 1t+1t+10 00 01 11 10 01 10 01 11 10 01 10 00 01 11 10 0X =X = 0X = X = 11 10 01 10 01 10 00 01 1State TableY Y2 2Y Y1 1X X0 00 01 01 01 11 10 00 00 00 01 11 11 1 1 10 10 1State DiagramSynchronous Modulo-4 up-down Synchronous Modulo-4 up-down countercounterAnalysis example124 /40Statement of the logic CircuitSynchronous Modulo-4 up-down counterSynchronous Modulo-4 up-down counterTiming DiagramNegative edge Negative edge trigger clocktrigger clockAnalysis example11 12 23 34 45 56 67 78 89 91 11 11 11 10 00 00 00 00 0 0 01 11 1 0 0 0 0 0 0 1 1 1 1 0 00 01 10 01 1 0 0 1 10 01 1 0 00 00 00 01 10 00 00 01 10 0X XCPCPY Y2 2Y Y1 1Z Z25 /40Analysis example2lOutput equationlZ=XY2Y1’ lExcitation equationlT2=((Y2Y1’)’((Y2⊕Y1)X)’)’ =Y2Y1’+(Y2⊕Y1)XlT1=Y1⊕XlFlip-flop characteristics equationlYt+1=Yt⊕TT2Y2Y2’T1Y1Y1’XZCPMealy 26 /40lNext-state equationlY1t+1=Y1⊕T1=Y1⊕Y1⊕X=XlY2t+1=Y2⊕T2=Y2⊕(Y2Y1’+(Y2⊕Y1)X)lY2⊕(Y2Y1’+(Y2⊕Y1)X)Analysis example2Present Present statestateNext state/outputNext state/outputY Y2 2 Y Y1 1Y Y2 2t+1 t+1 Y Y1 1t+1t+1/Z/Z0 00 01 11 10 01 10 01 10 00 00 00 00 00 00 01 1X =X = 0X = X = 1/0/0/0/0/0/0/0/01 11 11 11 10 01 10 01 1/0/0/0/0/1/1/0/00 0 11 0 0 1 10 0 00 1 1 1 10 1 01 0 1 0 10 0 11 0 0 1 127 /40l l“1101” sequence detector“1101” sequence detectorl lThe last bit “1” can overlap with the The last bit “1” can overlap with the next “1101” sequencenext “1101” sequenceAnalysis example2100011010/01/00/01/10/00/01/01/0DACB0/01/00/01/10/00/01/01/028 /40positive edge positive edge trigger clocktrigger clockAnalysis example21 12 23 34 45 56 67 78 89 91 11 11 10 01 11 10 01 10 0 1 11 11 1 0 0 1 1 1 1 0 0 1 1 0 00 01 11 11 1 0 0 1 11 10 0 0 00 00 00 00 00 00 00 0X XCPCPY Y2 2Y Y1 1Z Z1 11 11 11 1100011010/01/00/01/10/00/01/01/0lZ=XY2Y1’ 29 /40Analysis example3lOutput equationlZ=Y2Y1’lExcitation equationlD2=X’Y1lD1=X+Y2’Y1lFlip-flop characteristics equationlYt+1=DD2Y2Y2’D1Y1Y1’XZCPMoore30 /40lNext-state equationlY2t+1=D2=X’Y1lY1t+1=D1=X+Y2’Y1Analysis example3Present Present statestateNext stateNext stateY Y2 2 Y Y1 1Y Y2 2t+1t+1Y Y1 1t+1t+10 00 01 11 10 01 10 01 10 01 10 00 00 01 10 01 1X=X=0X=X=11 11 11 11 10 00 00 00 0OutputOutputZ Z0 00 01 10 0lOutput equationlZ=Y2Y1’31 /40l l“ “100” sequence detector100” sequence detectorAnalysis example3D/1A/0C/0B/00 1 100011110/100/011/001/00 1 10001132 /40Analysis example31 12 23 34 45 56 67 78 89 91 11 10 00 00 01 10 00 01 1 0 00 01 1 1 1 0 0 0 0 1 1 1 1 0 01 11 11 10 0 0 0 1 11 10 0 1 10 00 00 01 10 00 00 0X XCPCPY Y2 2Y Y1 1Z Z1 110/100/011/001/00 1 100011lOutput equationlZ=Y2Y1’33 /40Asynchronous circuit analysisPay attention to Clock Pulse Pay attention to Clock Pulse clock equations34 /40e.g.e.g.(1) circuit equations(1) circuit equations① clock equations① clock equations②②output equations③③driving equations CPCP0 0=CP, =CP, CPCP1 1=Q=Q0 0 ，， (2) Characteristic equations(2) Characteristic equations(CP 0(CP 0→→1) 1) ( (Q Q0 0 0 0→→1) 1) 35 /40(3) State table(3) State table、、state diagram and timingstate diagram and timing 1 0 / 10110 1 / 0010 0 / 00101 1 / 000CP1 CP0 36 /40(4) Logic function(4) Logic function Asynchronous M-4 down counterThe duty cycle ratio of Z is 25% and its period is 4*Tcp 37 /40Analyze the diagram and evaluate the design quality38 /40SolutionD4=Q4Q2+Q1D3=Q4D2=Q3D1=Q239 /40Conclusionsl4-bit flip-flops for Modulo-8 counterlAuto bootablel8 states are redundantl3-bit flip-flops enoughlQuality: Poor40 /40。