
信号施密特触发器缓冲.pdf
13页?????? ??????????????? ??????SCES376J − SEPTEMBER 2001 − REVISED OCTOBER 20031POST OFFICE BOX 655303 • DALLAS, TEXAS 75265?Available in the Texas Instruments NanoStar and NanoFree Packages ?Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation ?Ioff Supports Partial-Power-Down Mode Operation ?Sub 1-V Operable ?Max tpd of 2.4 ns at 1.8 V ?Low Power Consumption, 10-µA Max ICC ?±8-mA Output Drive at 1.8 V ?Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ?ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101)description/ordering informationThis single Schmitt-trigger buffer is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.The SN74AUC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT−) signals.NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.ORDERING INFORMATIONTAPACKAGE†ORDERABLE PART NUMBERTOP-SIDE MARKING‡NanoStar − WCSP (DSBGA) 0.17-mm Small Bump − YEASN74AUC1G17YEARNanoFree − WCSP (DSBGA) 0.17-mm Small Bump − YZA (Pb-free) Tape and reelSN74AUC1G17YZAR_ _ _U7_−40°C to 85°CNanoStar − WCSP (DSBGA) 0.23-mm Large Bump − YEPTape and reel SN74AUC1G17YEPR_ _ _U7_NanoFree − WCSP (DSBGA) 0.23-mm Large Bump − YZP (Pb-free)SN74AUC1G17YZPRSOT (SOT-23) − DBVTape and reelSN74AUC1G17DBVRU17_SOT (SC-70) − DCKTape and reelSN74AUC1G17DCKRU7_†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at ‡DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).Copyright 2003, Texas Instruments IncorporatedPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.NanoStar and NanoFree are trademarks of Texas Instruments.DBV OR DCK PACKAGE (TOP VIEW)12354NC A GNDVCCYNC − No internal connectionDNU − Do not use32145GND A DNUYVCCYEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW)?????????? ???? ??????????? ?? !“??#?? ?? ?? $“%&?!????? ’??#( ???’“!?? !?????? ?? ?$#!???!?????? $#? ?)# ?#??? ?? ?#*?? ?????“?#??? ????’??’ +??????,( ???’“!???? $??!#????- ’?#? ??? ?#!#?????&, ??!&“’# ?#????- ?? ?&& $????#?#??(??????????? ?????? ??????????????? ??????SCES376J − SEPTEMBER 2001 − REVISED OCTOBER 20032POST OFFICE BOX 655303 • DALLAS, TEXAS 75265description/ordering information (continued)This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.FUNCTION TABLEINPUT AOUTPUT YHHLLlogic diagram (positive logic)AY24absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†Supply voltage range, VCC −0.5 V to 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (see Note 1) −0.5 V to 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) −0.5 V to 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input clamp current, IIK (VI < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output clamp current, IOK (VO < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous output current, IO ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous current through VCC or GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Note。












