专英(加强版).pdf

BJT：双极结型晶体管： bipolar junction transistor MOS: 金 属 氧 化 物 半 导 体 型metal oxide semiconductor type FET: 场效应晶体管field effect transistor LED：发光二极管light emitting diode IC: 集成电路integrated circuit MGS：冶金级硅metallurgical grade silicon EGS: 电子级硅electronic grade silicon VPE：气相外延vapor phase epitaxy CVD: 化学气相沉积chemical vapor deposition PVD: 物理气相沉积physical vapor deposition 1. 参杂 doping 2. 选择性参杂selective doping 3. 腐蚀剂 etchant 4. 离子注入ion implantation 5. 光刻 lithography 6. 惰性离子inert ion 7. 扩散 diffusion 8. 高温 elevated temperature 9. 杂质 impurity 10.原料 starting materials 11.相 phase 12.氧化 oxidation 13.非结晶的amorphous 14.外延 epitaxy 15.湿化学腐蚀wet chemical etching 16.沉淀 deposition 17.晶体生长crystal grouth Many novel device structures, especially for microwave and photonic devices, can be made by epitaxial processes. Later in this chapter we consider some important epitaxial growth techniques 许多新型器件结构，特别是微波和光子器件能够用外延法制备。

稍后在这章我们会给大家介绍一些重要的外延生长技术A phase is a state (e.g., solid, liquid, or gaseous) in which a material may exist. A phase diagram shows the relationship between two components (e.g., gallium and arsenic) as a function of temperature. 一个相代表在某种条件下物质存在的一个态（如固态、液态、气态）一个相图给出了两种组分（如镓和砷）存在之间的联系如温度函数[ （ 非 红 色， 但 老 师 复习 课 讲 到） the Czochralski technique for silicon growth uses an apparatus called a puller, as shown in Figure 3-1.The puller has three main components:(1) a furnace, which includes a fused-silica(SiO2) crucible, a graphite susceptors , a rotation mechanism (clockwise as shown), a heating element, and a power supply; (2)a crystal-pulling mechanism, which includes a seed holder and a rotation mechanism (counter-clockwise); and (3) an ambient control, which includes a gas source (such as argon), a flow control, and a exhaust system 。

单晶硅生长的丘克拉斯基法所用设备为提拉装置如图3－1它有三个主要部分 : (1）炉子包括熔石英坩锅、石墨基座、旋转装置（顺时针）、 加热单元和动力系统；（2）晶体提拉系统包括一个籽晶夹具和旋转系统（逆时针） ；和（3）环境控制如气源（如氩气） 、工艺控制和排气系统 ) In addition, the puller has a overall microprocessor-based control system to control process parameters such as temperature, crystal diameter, pull rate, and rotation speeds, as well as to permit programmed processed steps. Also, various sensors and feedback loops allow the control system to respond automatically, thereby reducing operator intervention. 另外，有一套基于微处理器控制的控制系统对提拉装置进行全面控制，可控制诸如温度、晶体直径、牵引速度、旋转速度等，同时可对工艺过程进行编程控制。

同时，不同传感器和反馈电路能够自动调整，从而减小操作干扰Among various epitaxial processes ，vapor phase epitaxy (VPE) is by far the most important for silicon devices. VPE is also important for gallium arsenide, but other epitaxial processes (e.g., molecular-beam epitaxy) can provide certain advantages not obtainable from VPE. 在各种外延方法中，气相外延是至今为止制备硅器件的一种最重要的方法气相外延对砷化镓同样重要，但其它外延方法（如分子束外延）具有某种气相外延没有的优势The reaction of Eq. 3-4 is reversible, that is ,it can take place in either direction. If the carrier gas entering the reactor contains hydrochloric acid, removal or etching will take place. Actually , this etching operation is used for in-situ cleaning of the silicon wafer prior to epitaxial growth 反应是可逆的，也就是说两个方向都可发生。

如果进入反应器的载体气体包含氯化氢， 清除或腐蚀会发生事实上，这种腐蚀操作可用于在外延生长前硅片表面清洗To fabricate discrete devices and integrated circuits we use many different kinds of thin film. We can classify thin films into four groups: thermal oxides, dielectric layers, polycrystalline silicon, and metal films. 为制备独立器件和集成电路我们要用到多种薄膜我们将薄膜分成四类：热氧化层、介电层、多晶硅和金属薄膜Dielectric layers such as the deposited silicon dioxide and silicon nitride are used for insulation between conducting layers, for diffusion and ion implantation masks, for capping doped films to prevent the loss of dopants，and for passivation to protect devices from impurities, moisture, and scratches. Polycrystalline silicon, usually referred to as polysilicon, is used as gate electrode material in MOS devices ,as a conductive material for devices with shallow junctions. 淀积的二氧化硅、氮化硅等电介质层作为导电层之间的绝缘层，可作为扩散和离子注入时的掩蔽层，也可作为掺杂薄膜之上覆盖层以防止掺杂损失，同时可作为钝化层防止器件受外界杂质、潮湿空气、划痕等的影响。

多晶硅通常写作polysilicon, 它对于浅结器件来说是导电材料，在MOS 型器件中常用做栅极材料Implant dose, annealing temperature , and annealing time all influence the sheet resistance of implanted polysilicon. Carrier traps at the grain boundaries cause a very high resistance in highly implanted polysilicon. Resistance drops rapidly, approaching that of implanted single crystal silicon, as the carrier traps become saturated with dopants. 注入量、退火温度和退火时间都影响注入多晶硅的表面电阻在晶粒边缘的载流子注入导致在高注入多晶硅非常高的电阻由于载流子注入达到饱和后，电阻很快降低且达到注入单晶硅的电阻值Process parameters that affect the polysilicon structure are deposition temperature, dopants, and the heat cycle applied following the deposition step. 影响多晶结构的工艺参数是沉积温度、掺杂物和沉积过程中的外加热周期过程。

Diffusion and ion implantation are the two key processes we use to introduce controlled amounts of dopants into semiconductors. They are used to dope selectively the semiconductor substrate to produce either an n-or p-type region. Until the early 1970S, selective doping was done mainly by diffusion at elevated temperatures. 扩散和离子注入是我们用于往半导体材料掺入可控量掺杂物的两种关键方法有选择在半导体衬底上掺杂制备 n、p 型区域直到二十世纪七十年代前， 有选择的掺杂主要是在高温下通过扩散完成The advantages o。