
[工学]2 测控总线技术3-2_v09.ppt
116页2.4 VXI总线与仪器系统集成2. 测控总线技术VXI – VMEbus eXtensions for Instrumentation (1987)IEEE Std 1155199222.4.3 VXI - Enhancements to VME2.4 VXI总线及仪器系统集成3VXIbus History1984USAF MATE User's Group (Army – CASS, Navy – IFTE)=> Requirement and standards of InstrumentsonaCard1987 AprilVXIbus Consortium FormedColorado Data System, HP, Racal Dana, Tektronix and Wavetek1987 JulyVXIbus Revision 1.0 Published1992 AprilVXIbus Revision 1.4 PublishedIEEE STD 115519921999 Aug.VXIbus Revision 2.0 Published2003 VXIbus Revision 3.0 Published2009 VXIbus Revision 4.0 Published4VXIbus 对 VME 的扩展lMechanical(机械特性) Card Sizes/Spacing Compatibility CoolinglElectrical(电气特性) Complete Pin Definitions Triggers, Clocks Analog Signal BusinglPower/EMC(电源/电磁兼容性) Additional Power Supplies Noise Radiated/SusceptibilitylCommunication(通信规范) Device Types Protocols System Configuration52.4.3.1 机械特性2.4 VXI总线及仪器系统集成6VXIbus Additions10x16 cm23.3x16 cm23.3x34 cm36.7x34 cm2 cm2 cm3 cm3 cmABCDStandard VMEAdditional SizesEurocard SizesCommon ProtocolsFor AllCard SizesSlot SpacingVXI Additionsl Mechanical–Card Sizes/Spaces–Compatibility–Coolingl Electrical–Complete pin definitions–Triggers, clock–Analog/digital signal busingl Power/EMC–Additional voltages–Noise radiation/susceptibilityl Communication–System configuration–Protocols–Device types7Module Sizes4种模块尺寸满足对性能的要求 Four Module Sizes Offer Performance Tradeoffs (such performance may not be attained on VME sizes)ABCDSpacing3.9x6.3 in (10x16 cm)9.2x6.3 in (23x16 cm)14.4x13.4 in (36x34 cm)9.2x13.4 in (23x34 cm)A,B 0.8 inches (2 cm) C,D 1.2 inches (3 cm)8VXIbus Module Widthl8 in. (20 mm) for A & B modules Same as VMEbusl1.2 in. (30 mm) for C & D modules Wider for instrumentation• Shielding 屏蔽• analog components (e.g. 继电器 relays and 变压器 transformers) 适于体积比较大的模拟器件的安装• additional airflow cooling 增加空气对流冷却9冷却 CoolinglVMEbus 没有定义模块和机箱的冷却规范lVXIbus 要求必须给出每个模块和机箱的冷却条件 requires module and mainframe cooling to be specified per slot (NOT ADDITIVE)lEvery 10 deg C rise in temperature will double the failure rate 温度每增加10度,系统的失效率增加一倍10E8408A Cooling specs2.01.51.00.52.04.06.08.00.0Pressure Drop Across ModuleAirflow Liter/SE1411B 5-½ Digit Digital Multimeter Watts/slot=8.50 Delta P (mm H20)=0.14 Air Flow Liters/s=.71E8491B FireWire IEEE-1394 Watts/slot=20 Delta P (mm H20)=0.10 Air Flow Liters/s=2E1406A * Command Module Watts/slot=19 Delta P (mm H20)=0.30 Air Flow Liters/s=1.5E8462A 256-Channel Multiplexer Watts/slot=30max Delta P (mm H20)=0.10 Air Flow Liters/s=3*112.4.3.2 电气特性2.4 VXI总线及仪器系统集成12VXIbus Electrical Architecture• VME computer bus• Clock & SYNC100 bus• STAR bus• Trigger bus• Local bus• Analog SUMBUS• Module identification bus• Power busEight Busses13VXIbus Electrical Architecture星形线模块识别线时钟与同步线加法总线触发总线VME总线全局总线单总线局部总线电源总线3 槽 模 块4 槽 模 块0 槽 模 块1 槽 模 块2 槽 模 块14VXIbus Electrical ArchitectureABCDP1P2 [optional]P3 [optional]15VXIbus Electrical DefinitionslP1 Already fully defined by VMElP2 [optional] VXIbus fully defines A & C rows (USER DEFINED in VME)lP3 [optional] Added by VXIbus, fully defined16VXIbus Electrical Additions (cont’d)lP2 (32x3 pins)lAddress lines and data bus defined by VMElIncrease width of Data Bus to 32 lineslIncrease width of Address Bus to 32 lineslTrigger Buses (8 TTL TTLTRIG[0:7], 2 ECL ECLTRIG[0:1])lLocal Bus (12, LBUS[0:11])lCLK10:10 MHz Clock Bus (2 ECL,由0槽差分驱动)lAnalog Summing Line (1):模拟电流源驱动lMore power for modules (+5V, 24V / 5.2V, 2V for ECL )17ECL电路lECL电路是射极耦合逻辑 (Emitter Couple Logic) 集成电路的简称。
l与TTL电路不同,ECL电路的最大特点是其基本门电路工作在非饱和状态所以,ECL电路具有相当高的速度,但功耗较大l这种电路的平均延迟时间在纳秒甚至亚纳秒(1/10 ns) 数量级,这使得ECL集成电路在高速和超高速数字系统中充当无以匹敌的角色 18VXIbus Electrical Additions (cont’d)lP3 (32x3 pins)lCLK100:100MHz 时钟线(2 ECL 差分), 必须与CLK10同步lSYNC100:100MHz同步信号 用于使多个模块与给定的CLK100 时钟信号的上升沿同步在功能方面,类似于GPIB的群执行触发命令,但时间一致性有很大改善l星形总线:提供模块间异步通讯的能力在各模块插槽和0槽之间,都连接有两对星形线(STARx/STARy),SRAT线是双向的,增加了使用的灵活性l增加了触发总线宽度 (4, ECLTRIG[2:5])l增加了局部总线宽度 Increase width of Local Bus to 36 lines (24, LBUS[12:35])l增加了电源 More power for modules (2V, 5.2V, +5V, 12, 24V)19Power• Power VXI added power supplies• +5 VDC Main power source for most VXI Instruments• +/ 12 VDC Used for powering analog devices, communications interfaces• +/ 24 VDC Used for powering analog signal sources (20V into hi Z) plus +/ 15 V regulators• 5.2 VDC For ECL devices• 2 VDC Used for the termination of ECL loads20VXIbus P2 Connector, Slots 112VXIbus P2/J2 Connector, Slots 112Pin NumberRow ARow BRow C12 345 6 78 910 111213 1415161718 19 202122 23 24 2526272829303132ECLTRG0-2V ECLTRG1GNDLBUSA00 LBUSA01 -5.2VLBUSA02 LBUSA03GND LBUSA04LBUSA05-5.2V LBUSA06LBUSA07GNDLBUSA08LBUSA09 -5.2V LBUSA10LBUSA11GND TTLTRG0* TTLTRG2* +5VTTLTRG4*TTLTRG6*GNDRSV2MODIDGNDSUMBUS+5VDCGND RSV1A24A25 A26 A27A28 A29A30 A31GND+5VDC D16D17D18D19D20 D21 D22D23D24 GND D25 D26D27D28D29D30D31GND+5VDCCLK10+CLK10- GND-5.2VLBUSC00 LBUSC01 GNDLBUSC02 LBUSC03GND LBUSC04LBUSC05-2V LBUSC06LBUSC07GNDLBUSC08LBUSC09 -5.2V LBUSC10LBUSC11GND TTLT。
