第9章皮尔斯振荡器.pdf

第 9 章皮 尔 斯 振 荡 器Pierce Oscillator (S12XOSCLCPV2) 赵洪慷 zhaohongkang@ 9.1 Introduction简介The Pierce oscillator (XOSC) module provides a robust, low-noise and low-power clock source. The module will be operated from the VDDPLL supply rail (1.8 V nominal) and require the minimum number of external components . It is designed for optimal start-up margin with typical crystal oscillators.皮尔斯振荡器(XOSC) 模块提供了一个强健、低噪音和低功耗的时钟源这种模型由VDDPLL supplyrail (1.8 V nominal) 操作并且需要提供扩充组件数量的最小值它是以典型的晶体振荡器为工具，为最佳的启动margin 而设计的。

它的设计就是为了优化启动边缘有典型的晶体振荡器9.1.1 特点①The XOSC will contain circuitry to dynamically control current gain in the output amplitude.XOSC将 控 制 电 路系 统去 动 态 的 控 制 获取 通 用的 / 现 在的???????输出振幅②This ensures a signal with low harmonic distortion , low power and good noise immunity. 这确保了一个信号能够拥有低和谐的失真、 低能耗并且能够很好的去除噪音等特点③High noise immunity due to input hysteresis 输入滞后带来高噪音免疫力④Low RF emissions with peak-to-peak swing limited dynamically 低 RF发射功率被动态限制在尖峰对尖峰上下间摇摆⑤Transconductance (gm) sized for optimum start-up margin for typical oscillators. 跨导（GM）为典型振荡器按大小分类以获得最适宜的启动margin。

⑥Dynamic gain control eliminates the need for external current limiting resistor.动态收获控制消除对外部电流限制限流电阻器的需求⑦Integrated resistor eliminates the need for external bias resistor in loop controlled Pierce mode.在环控制皮尔斯模式中，集成电阻器消除对外部偏离bias 电阻器的需求 ⑧Low power consumption 低功耗 : ——Operates from 1.8 V (nominal) supply 1.8V电压支持运行——Amplitude control limits power 振幅控制限制能量需求9.1.2Modes of Operation操作模式Two modes of operation exist 两种现存的操作模式1. Loop controlled Pierce (LCP) oscillator周期 控制皮尔斯（LCP）振荡器2. External square wave mode featuring also full swing Pierce (FSP) without internal bias resistor. 外部方波模式也以没有内部偏离电阻器的全振荡皮尔斯（FSP）为特色The oscillator mode selection is described in the Device Overview section, subsection Oscillator。

振荡器模式选择在装置综述章节细分振荡器部分描述Figure 9-1 显示 XOSC 的模块图9.1.3 Block Diagram 模块图Figure 9-1 shows a block diagram of the XOSC. Figure9-1.XOSC Block Diagram 9.2 External Signal Description 外部信号描述This section lists and describes the signals that connect off chip 本部分列举并描述了芯片间联系的信号9.2.1 VDDPLL and VSSPLL — Operating and Ground V oltage Pins VDDPLL 和VSSPLL——运行和基础电压引脚These pins provides operating voltage (VDDPLL) and ground (VSSPLL) for the XOSC circuitry. This allows the supply voltage to the XOSC to use an independent bypass capacitor. 这些引脚为 XOSC电路系统提供运行电压(VDDPLL) 和基础 (VSSPLL) 。

这样就让 XOSC的供应电压能够使用一个独立的绕行电容器9.2.2 EXTAL and XTAL — Input and Output PinsEXTAL 和XTAL —输入输出引脚These pins provide the interface for either a crystal or a 1.8V CMOS compatible clock to control the internal clock generator circuitry. EXTAL is the external clock input or the input to the crystal oscillator amplifier. XTAL is the output of the crystal oscillator amplifier. The MCU internal system clock is derived from the EXTAL input frequency. In full stop mode(PSTP-0),the EXTAL pin is pulled down by an internal resisitor of typical 200千欧姆 . 这些引脚为crystal 或 1.8V CMOS compatible clock提供控制内部时钟generator 电路系统的接口。

EXTAL 是晶体振荡器放大器的输出MCU 内置系统时钟由EXTAL 驶入频率而衍生出在全等待模式（PSTP-0）， EXTAL 引脚被内置的200 千欧姆的内置电阻pull downNOTEFreescale recommends an evaluation of the application board and chosen resonator orcrystal by the resonator or crystal supplier. 注：飞思卡尔建议使用对应用板和选择共振器或者晶体进行评估Loop controlled circuit is not suited for overtone resonators and crystals. 周期控制电路不适合于overtone 共振器和crystalsFigure 9-2 Loop Controlled Pierce Oscillator Connections (LCP mode selected) 周期控制皮尔斯振荡器连接（选择LCP 模式）NOTEFull swing Pierce circuit is not suited for overtone resonators and crystals without a careful component selection.注：不认真地挑选组件，全振荡皮尔斯电路不适应于overtone 共振器和晶体。

Rs can be zero (shorted) when use with higher frequency crystals. Refer to manufacturer's data.MCUFigure 9-3. Full Swing Pierce Oscillator Connections (FSP mode selected) 全振荡皮尔斯振荡器连接（选择FSP 模式）Figure 9-4. External Clock Connections (FSP mode selected) 外部时钟连接（选择FSP 模式）9.3 Memory Map and Register DefinitionThe CRG contains the registers and associated bits for controlling and monitoring the oscillator module. CRG包含寄存器和与控制监视振荡器模式相关的bits9.4 Functional Description功能描述The XOSC module has control circuitry to maintain the crystal oscillator circuit voltage level to an optimal level which is determined by the amount of hysteresis being used and the maximum oscillation range. The oscillator block has two external pins, EXTAL and XTAL. The oscillator input pin, EXTAL, is intended to be connected to either a crystal or an external clock source. The XTAL pin is an output signal that provides crystal circuit feedback. A buffered EXTAL signal becomes the internal clock. To improve noise immunity, the oscillator is powered by the VDDPLL and VSSPLL power supply pins. XOSC 模式使用控制电路来维持晶体振荡器电路电压值在一个最佳的状态，这个最佳电压值由正在被使用的hyseresis数量和振荡范围的最大给共同决定。

振荡器模块有两个外部引脚，EXTAAL和 XTAL 输入引脚EXTAL是为连接晶体或者外部时钟源而准备，XTAL 是一个输出信号，它提供晶体电路的反馈结果缓冲 EXTAL信号成为内部时钟为了提高噪音免疫力，使用VDDPLL和 VSSPLL 供能引脚为振荡器供电9.4.1 Gain Control 获取控制In LCP mode a closed loop control system will be utilized whereby the amplifier is modulated to keep。