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S7-400 Instruction List _en

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S7-400 Instruction List _en

S7 400 Instruction List CPU 412 414 416 417 This Instruction List has the order number 6ES7498 8AA04 8BN0 Edition 12 2004 A5E00267845 02 www PLC We have checked the contents of this manual for agreement with the hardware and software described Since deviations cannot be precluded entirely we cannot guarantee full agreement However the data in this manual are reviewed regularly and any necessary corrections included in subsequent editions Suggestions for improvement are welcomed Disclaimer of LiabilityCopyright Siemens AG 2004 All rights reserved The reproduction transmission or use of this document or its contents is not permitted without express written authority Offenders will be liable for damages All rights including rights created by patent grant or registration of a utility model or design are reserved Siemens AG Bereich Automation and Drives Geschaeftsgebiet Industrial Automation Systems Postfach 4848 D 90327 Nuernberg Siemens AG 2004 Subject to change without prior notice Siemens Aktiengesellschaft6ES7498 8AA04 8BN0 www PLC Contents 1 S7 400 Instruction List A5E00267845 02 Contents Contents1 Applicability5 Constants and Ranges9 Abbreviations and Mnemonics10 Registers12 Examples of Addressing15 Examples of how to calculate the pointer18 Execution Times with Indirect Addressing119 Examples of Calculations21 List of Instructions24 Bit Logic Instructions25 Bit Logic Instructions with Parenthetical Expressions28 Bit Logic Instructions with Parenthetical Expressions continued29 ORing of AND Instructions30 Logic Instructions with Timers and Counters31 Word Logic Instructions with the Contents of Accumulator 133 Evaluating Conditions Using AND OR and EXCLUSIVE OR35 www PLC Contents 2 S7 400 Instruction List A5E00267845 02 Edge Triggered Instructions38 Setting Resetting Bit Addresses39 Instructions Directly Affecting the RLO41 Timer Instructions42 Counter Instructions45 Load Instructions47 Load Instructions for Timers and Counters53 Transfer Instructions54 Load and Transfer Instructions for Address Registers57 Load and Transfer Instructions for the Status Word59 Load Instructions for DB Number and DB Length60 Integer Math 16 Bits 61 Integer Math 32 Bits 63 Floating Point Math 32 Bits 65 Square Root and Square Instructions 32 Bits 67 Logarithmic Function 32 Bits 68 Trigonometrical Functions 32 Bits 69 Adding Constants70 Adding Using Address Registers71 www PLC Contents 3 S7 400 Instruction List A5E00267845 02 Comparison Instructions 16 Bit Integers 72 Comparison Instructions 32 Bit Integers 73 Comparison Instructions 32 Bit Real Numbers 74 Shift Instructions75 Rotate Instructions77 Accumulator Transfer Instructions Incrementing and Decrementing79 Accumulator Transfer Instructions Incrementing and Decrementing continued80 Program Display and Null Operation Instructions81 Data Type Conversion Instructions82 Forming the Ones and Twos Complements85 Block Call Instructions86 Block End Instructions89 Exchanging Shared Data Block and Instance Data Block90 Jump Instructions91 Instructions for the Master Control Relay MCR 97 www PLC Contents 4 S7 400 Instruction List A5E00267845 02 Oganization Blocks OB 99 Function Blocks FB 104 Functions FC and Data Blocks105 System Functions106 System Function Blocks140 Sublist of the System Status List SSL 149 Alphabetical Index of Instructions155 www PLC Applicability 5 S7 400 Instruction List A5E00267845 02 Applicability This list of instructions applies to the CPUs listed below NameOrder numbersubsequently described as1 CPU 412 16ES7412 1XF04 0AB0 CPU 412 CPU 412 26ES7412 2XG04 0AB0 CPU 412 CPU 414 26ES7414 2XG04 0AB0 CPU 414 36ES7414 3XJ04 0AB0 CPU 414 CPU 414 4H6ES7414 4HJ04 0AB0 CPU 414 CPU 416 26ES7416 2XK04 0AB0 CPU 416F 26ES7416 2FK04 0AB0 CPU 416 CPU 416 36ES7416 3XL04 0AB0 CPU 416 CPU 417 46ES7417 4XL04 0AB0 CPU 417 CPU 417 4 H6ES7417 4HL04 0AB0 CPU 417 1 except in the tables where a detailled differentiation is necessary www PLC Address Identifier and Parameter Ranges 6 S7 400 Instruction List A5E00267845 02 Address Identifier and Parameter Ranges Addr Parameter RangeDescription IDCPU 412CPU 414CPU 416CPU 417 Description Q2 0 0 to 127 70 0 to 255 70 0 to 511 70 0 to 1023 7Output in PIQ QB2 0 to 1270 to 2550 to 5110 to 1023Output byte in PIQ QW2 0 to 1260 to 2540 to 5100 to 1022Output word in PIQ QD2 0 to 1240 to 2520 to 5080 to 1020Output double word in PIQ DBX0 0 to 65533 71 0 0 to 65533 70 0 to 65533 70 0 to 65533 7Data bit in data block DB1 to 5111 to 40951 to 40951 to 8191Data block DBB0 to 655331 0 to 655330 to 655330 to 65533Data byte in DB DBW0 to 65532 1 0 to 655320 to 655320 to 65532Data word in DB DBD0 to 655301 0 to 655300 to 655300 to 65530Data double word in DB DIX0 0 to 65533 71 0 0 to 65533 70 0 to 65533 70 0 to 65533 7Data bit in instance DB DI1 to 5111 to 40951 to 40951 to 8191Instance data block DIB0 to 655331 0 to 655330 to 655330 to 65533Data byte in instance DB DIW 0 to 655321 0 to 655320 to 655320 to 65532Data word in instance DB DID0 to 655301 0 t

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